๋ณธ๋ฌธ ๋ฐ”๋กœ๊ฐ€๊ธฐ
Computer Science/Computer Structure

16 Input & Output process

by Dowon Kang 2024. 1. 6.

๋‹ค์–‘ํ•œ ํ˜•ํƒœ์˜ ์ž…์ถœ๋ ฅ ๋ฐฉ์‹๋“ค์€ ํ”„๋กœ๊ทธ๋žจ์ด ๋ฐ์ดํ„ฐ๋ฅผ ์ฃผ๊ณ  ๋ฐ›๋Š” ๋ฐฉ์‹์— ๋Œ€ํ•œ ๋‹ค์–‘ํ•œ ์ ‘๊ทผ์„ ์ œ๊ณตํ•ฉ๋‹ˆ๋‹ค.

1) ํ”„๋กœ๊ทธ๋žจ ์ž…์ถœ๋ ฅ 

์ด๋Š” ๊ฐ€์žฅ ๊ธฐ๋ณธ์ ์ธ ์ž…์ถœ๋ ฅ ๋ฐฉ์‹์œผ๋กœ, ํ”„๋กœ๊ทธ๋žจ์ด ์ง์ ‘ ์ž…์ถœ๋ ฅ ์ž‘์—…์„ ์ˆ˜ํ–‰ํ•˜๋Š” ๋ฐฉ์‹์ž…๋‹ˆ๋‹ค. ํ”„๋กœ๊ทธ๋žจ์ด ๋ฐ์ดํ„ฐ๋ฅผ ์ฝ๊ฑฐ๋‚˜ ์“ธ ๋•Œ, ์ž…์ถœ๋ ฅ ๋ช…๋ น์„ ํ†ตํ•ด ์ œ์–ด๋ฅผ ์ง์ ‘ ์ˆ˜ํ–‰ํ•ฉ๋‹ˆ๋‹ค. ์ด ๋ฐฉ์‹์€ ๋‹จ์ˆœํ•˜๊ณ  ์ง๊ด€์ ์ด์ง€๋งŒ, ์ž…์ถœ๋ ฅ ์ž‘์—…์ด ์ง„ํ–‰๋˜๋Š” ๋™์•ˆ CPU๊ฐ€ ๋‹ค๋ฅธ ์ž‘์—…์„ ์ˆ˜ํ–‰ํ•  ์ˆ˜ ์—†๋‹ค๋Š” ๋‹จ์ ์ด ์žˆ์Šต๋‹ˆ๋‹ค.

 

๋ฉ”๋ชจ๋ฆฌ์— ์ €์žฅ๋œ ์ •๋ณด๋ฅผ ํ•˜๋“œ๋””์Šคํฌ๋กœ ๋ฐฑ์—…(=์ €์žฅ or ์“ฐ๊ธฐ)ํ•œ๋‹ค๊ณ  ํ•ด๋ด…์‹œ๋‹ค. 

  1. CPU๋Š” ํ•˜๋“œ ๋””์Šคํฌ ์ปจํŠธ๋กค๋Ÿฌ์˜ ์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ์— '์“ฐ๊ธฐ ๋ช…๋ น' ์ „๋‹ฌ
  2. ํ•˜๋“œ ๋””์Šคํฌ ์ปจํŠธ๋กค๋Ÿฌ๋Š” ํ•˜๋“œ ๋””์Šคํฌ์˜ ์ƒํƒœ๋ฅผ ํ™•์ธํ•œ ๋‹ค์Œ ์ƒํƒœ ๋ ˆ์ง€์Šคํ„ฐ์— '์ค€๋น„ ์™„๋ฃŒ' ํ‘œ์‹œ
  3. ํ•˜๋“œ ๋””์Šคํฌ๊ฐ€ ์ค€๋น„๋˜์—ˆ๋‹ค๋ฉด ๋ฐ์ดํ„ฐ ๋ ˆ์ง€์Šคํ„ฐ์— ๋ฐฑ์—…ํ•  ๋ฉ”๋ชจ๋ฆฌ์˜ ์ •๋ณด๋ฅผ ๋ฐ์ดํ„ฐ ๋ ˆ์ง€์Šคํ„ฐ์— ์“ฐ๊ธฐ

์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ(Control Register): ํ•˜๋“œ ๋””์Šคํฌ์˜ ๋™์ž‘์„ ์ œ์–ดํ•˜๋Š” ๋ฐ ์‚ฌ์šฉ๋ฉ๋‹ˆ๋‹ค. ์ด ๋ ˆ์ง€์Šคํ„ฐ์—๋Š” ์–ด๋–ค ๋™์ž‘์„ ์ˆ˜ํ–‰ํ•  ๊ฒƒ์ธ์ง€์— ๋Œ€ํ•œ ์ •๋ณด๊ฐ€ ํฌํ•จ๋ฉ๋‹ˆ๋‹ค. ์˜ˆ๋ฅผ ๋“ค๋ฉด, ์ฝ๊ธฐ ์ž‘์—…์„ ์‹œ์ž‘ํ•˜๊ฑฐ๋‚˜ ์“ฐ๊ธฐ ์ž‘์—…์„ ์‹œ์ž‘ํ•˜๋Š” ๋ช…๋ น ๋“ฑ์ด ์žˆ์Šต๋‹ˆ๋‹ค.

์ƒํƒœ ๋ ˆ์ง€์Šคํ„ฐ(Status Register): ํ•˜๋“œ ๋””์Šคํฌ์˜ ํ˜„์žฌ ์ƒํƒœ๋ฅผ ๋‚˜ํƒ€๋ƒ…๋‹ˆ๋‹ค. ์ด ๋ ˆ์ง€์Šคํ„ฐ๋Š” ํ•˜๋“œ ๋””์Šคํฌ๊ฐ€ ํ˜„์žฌ ์–ด๋–ค ๋™์ž‘์„ ์ˆ˜ํ–‰ ์ค‘์ธ์ง€(์ฝ๊ธฐ ์ค‘, ์“ฐ๊ธฐ ์ค‘, ๋Œ€๊ธฐ ์ค‘ ๋“ฑ)์™€ ๊ฐ™์€ ์ •๋ณด๋ฅผ ๋‹ด๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.

๋ฐ์ดํ„ฐ ๋ ˆ์ง€์Šคํ„ฐ(Data Register): ์‹ค์ œ ๋ฐ์ดํ„ฐ๊ฐ€ ์ด ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ ํ†ตํ•ด ์ฝ๊ฑฐ๋‚˜ ์“ฐ์—ฌ์ง‘๋‹ˆ๋‹ค. ์ฝ๊ธฐ ์ž‘์—…์„ ์ˆ˜ํ–‰ํ•  ๋•Œ ํ•˜๋“œ ๋””์Šคํฌ์—์„œ ์ฝ์€ ๋ฐ์ดํ„ฐ๊ฐ€ ์ด ๋ ˆ์ง€์Šคํ„ฐ์— ์ €์žฅ๋˜๊ณ , ์“ฐ๊ธฐ ์ž‘์—…์„ ์ˆ˜ํ–‰ํ•  ๋•Œ๋Š” ์ด ๋ ˆ์ง€์Šคํ„ฐ์— ์“ฐ์—ฌ์ง„ ๋ฐ์ดํ„ฐ๊ฐ€ ํ•˜๋“œ ๋””์Šคํฌ๋กœ ์ „์†ก๋ฉ๋‹ˆ๋‹ค.

์ „๋ฐ˜์ ์œผ๋กœ, ์ž…์ถœ๋ ฅ ์žฅ์น˜(์˜ˆ: ํ•˜๋“œ ๋””์Šคํฌ)๋ฅผ ์ œ์–ดํ•˜๊ธฐ ์œ„ํ•ด ์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ ์‚ฌ์šฉํ•˜๊ณ , ์žฅ์น˜์˜ ์ƒํƒœ๋ฅผ ํ™•์ธํ•˜๊ธฐ ์œ„ํ•ด ์ƒํƒœ ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ ์ฝ์œผ๋ฉฐ, ์‹ค์ œ ๋ฐ์ดํ„ฐ๋ฅผ ์ „์†กํ•˜๊ธฐ ์œ„ํ•ด ๋ฐ์ดํ„ฐ ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ ์‚ฌ์šฉํ•˜๋Š” ๊ฒƒ์ด ์ผ๋ฐ˜์ ์ธ ์ž…์ถœ๋ ฅ ์‹œ์Šคํ…œ์˜ ๋™์ž‘ ๋ฐฉ์‹์ž…๋‹ˆ๋‹ค.

 

2) ๋ฉ”๋ชจ๋ฆฌ ๋งต ์ž…์ถœ๋ ฅ (Memory-Mapped I/O)

์ž…์ถœ๋ ฅ ์žฅ์น˜์˜ ๋ ˆ์ง€์Šคํ„ฐ์™€ ๋ฉ”๋ชจ๋ฆฌ ์ฃผ์†Œ ๊ณต๊ฐ„์ด ๊ฒน์น˜๋Š” ๋ฐฉ์‹์ž…๋‹ˆ๋‹ค. ์ž…์ถœ๋ ฅ ์žฅ์น˜์˜ ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ ๋ฉ”๋ชจ๋ฆฌ ์ฃผ์†Œ ๊ณต๊ฐ„์— ํ• ๋‹นํ•˜๊ณ , ํ”„๋กœ๊ทธ๋žจ์€ ๋ฉ”๋ชจ๋ฆฌ์— ์ ‘๊ทผํ•˜๋Š” ๊ฒƒ์ฒ˜๋Ÿผ ์ž…์ถœ๋ ฅ ๋ ˆ์ง€์Šคํ„ฐ์— ์ ‘๊ทผํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

 


3) ๊ณ ๋ฆฝํ˜• ์ž…์ถœ๋ ฅ (Isolated I/O)

๋™์ž‘ ์›๋ฆฌ: ํ”„๋กœ๊ทธ๋žจ์ด ์ž…์ถœ๋ ฅ ๋ช…๋ น์„ ์ „๋‹ฌํ•˜๋ฉด, ์ž…์ถœ๋ ฅ ์žฅ์น˜๋Š” ์ž‘์—…์„ ์ง์ ‘ ์ˆ˜ํ–‰ํ•˜๊ณ  ์ž‘์—…์ด ์™„๋ฃŒ๋˜๋ฉด CPU์—๊ฒŒ ์•Œ๋ฆฌ์ง€ ์•Š์Šต๋‹ˆ๋‹ค. ์ฆ‰, ์ž…์ถœ๋ ฅ ์ž‘์—…์ด ์™„๋ฃŒ๋˜๋Š” ๋™์•ˆ CPU๋Š” ๋Œ€๊ธฐ ์ƒํƒœ์— ์žˆ์Šต๋‹ˆ๋‹ค.


์žฅ์ : ๋‹จ์ˆœํ•˜๋ฉฐ ๊ตฌํ˜„์ด ์‰ฝ์Šต๋‹ˆ๋‹ค. ํŠนํžˆ ์ž…์ถœ๋ ฅ ์žฅ์น˜๊ฐ€ ์ž‘๊ณ  ๊ฐ„๋‹จํ•œ ๊ฒฝ์šฐ์— ํšจ๊ณผ์ ์ผ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.
๋‹จ์ : CPU๊ฐ€ ์ž…์ถœ๋ ฅ ์ž‘์—…์ด ์™„๋ฃŒ๋  ๋•Œ๊นŒ์ง€ ๋Œ€๊ธฐํ•ด์•ผ ํ•˜๋ฏ€๋กœ, ํšจ์œจ์„ฑ์ด ๋‚ฎ์„ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ๋‹ค๋ฅธ ์ž‘์—…์„ ์ˆ˜ํ–‰ํ•˜์ง€ ๋ชปํ•˜๊ณ  ๋Œ€๊ธฐํ•˜๊ฒŒ ๋˜๊ธฐ ๋•Œ๋ฌธ์ž…๋‹ˆ๋‹ค.

 

4) ์ธํ„ฐ๋ŸฝํŠธ ๊ธฐ๋ฐ˜ ์ž…์ถœ๋ ฅ (Interrupt-Driven I/O)

ํ”„๋กœ๊ทธ๋žจ์ด ์ž…์ถœ๋ ฅ ๋ช…๋ น์„ ์ „๋‹ฌํ•˜๋ฉด, ์ž…์ถœ๋ ฅ ์žฅ์น˜๋Š” ์ž‘์—…์„ ์‹œ์ž‘ํ•˜๊ณ  ์ž‘์—…์ด ์™„๋ฃŒ๋˜๋ฉด ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ๋ฐœ์ƒ์‹œ์ผœ CPU์—๊ฒŒ ์•Œ๋ฆฝ๋‹ˆ๋‹ค. CPU๋Š” ํ˜„์žฌ ์ˆ˜ํ–‰ ์ค‘์ธ ์ž‘์—…์„ ์ค‘๋‹จํ•˜๊ณ , ํ•ด๋‹น ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ์ฒ˜๋ฆฌํ•˜์—ฌ ์ž…์ถœ๋ ฅ ์ž‘์—…์˜ ์™„๋ฃŒ๋ฅผ ํ™•์ธํ•ฉ๋‹ˆ๋‹ค.

์žฅ์ : CPU๊ฐ€ ์ž…์ถœ๋ ฅ ์ž‘์—…์ด ์™„๋ฃŒ๋  ๋•Œ๊นŒ์ง€ ๋Œ€๊ธฐํ•˜์ง€ ์•Š๊ณ  ๋‹ค๋ฅธ ์ž‘์—…์„ ์ˆ˜ํ–‰ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋Š” ์‹œ์Šคํ…œ์˜ ํšจ์œจ์„ฑ์„ ๋†’์ผ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.
๋‹จ์ : ์ธํ„ฐ๋ŸฝํŠธ ์ฒ˜๋ฆฌ์— ๋Œ€ํ•œ ์˜ค๋ฒ„ํ—ค๋“œ๊ฐ€ ์žˆ์„ ์ˆ˜ ์žˆ์œผ๋ฉฐ, ๋ณต์žกํ•œ ๊ตฌํ˜„์ด ํ•„์š”ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ๋˜ํ•œ, ์ธํ„ฐ๋ŸฝํŠธ ์ฒ˜๋ฆฌ์— ๊ด€ํ•œ ์šฐ์„ ์ˆœ์œ„์™€ ๊ด€๋ฆฌ๊ฐ€ ํ•„์š”ํ•ฉ๋‹ˆ๋‹ค.

 


 

PIC(Programmable Interrupt Controller)

PIC(Programmable Interrupt Controller)๋Š” ์ปดํ“จํ„ฐ ์‹œ์Šคํ…œ์—์„œ ํ•˜๋“œ์›จ์–ด ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ๊ด€๋ฆฌํ•˜๋Š” ์žฅ์น˜์ž…๋‹ˆ๋‹ค. ์ฃผ๋กœ ์—ฌ๋Ÿฌ ํ•˜๋“œ์›จ์–ด ๋””๋ฐ”์ด์Šค๋กœ๋ถ€ํ„ฐ ๋ฐœ์ƒํ•˜๋Š” ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ๊ด€๋ฆฌํ•˜๊ณ , ์šฐ์„ ์ˆœ์œ„๋ฅผ ์ง€์ •ํ•˜์—ฌ CPU์— ์ „๋‹ฌํ•ฉ๋‹ˆ๋‹ค. ๋Œ€ํ‘œ์ ์ธ PIC๋กœ๋Š” 8259A๊ฐ€ ์žˆ์Šต๋‹ˆ๋‹ค.

์ฃผ์š” ๊ธฐ๋Šฅ

  • ์ธํ„ฐ๋ŸฝํŠธ์˜ ๋งˆ์Šคํ‚น (Interrupt Masking): ํŠน์ •ํ•œ ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ๋งˆ์Šคํฌํ•˜์—ฌ ํ•ด๋‹น ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ๋ฌด์‹œํ•˜๋„๋ก ์„ค์ •ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋Š” ํŠน์ • ์ƒํ™ฉ์—์„œ ํŠน์ • ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ์ฒ˜๋ฆฌํ•˜์ง€ ์•Š๋„๋ก ํ•  ๋•Œ ์œ ์šฉํ•ฉ๋‹ˆ๋‹ค.
  • ์ธํ„ฐ๋ŸฝํŠธ์˜ ์šฐ์„ ์ˆœ์œ„ ์ง€์ •: PIC๋Š” ๊ฐ ์ธํ„ฐ๋ŸฝํŠธ์— ๋Œ€ํ•ด ์šฐ์„ ์ˆœ์œ„๋ฅผ ๋ถ€์—ฌํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋ฅผ ํ†ตํ•ด ์—ฌ๋Ÿฌ ๋””๋ฐ”์ด์Šค์—์„œ ๋ฐœ์ƒํ•œ ์ธํ„ฐ๋ŸฝํŠธ ์ค‘์—์„œ ์–ด๋–ค ๊ฒƒ์„ ๋จผ์ € ์ฒ˜๋ฆฌํ• ์ง€๋ฅผ ๊ฒฐ์ •ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.
  • ๋‹ค์ค‘ PIC ๊ตฌ์„ฑ (Cascading): ์—ฌ๋Ÿฌ ๊ฐœ์˜ PIC๋ฅผ ์—ฐ๊ฒฐํ•˜์—ฌ ์‚ฌ์šฉํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋ฅผ ํ†ตํ•ด ๋” ๋งŽ์€ ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ์ฒ˜๋ฆฌํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ฃผ๋กœ Master PIC์™€ Slave PIC๋กœ ๊ตฌ์„ฑ๋˜๋ฉฐ, Master PIC๋Š” CPU์— ์ง์ ‘ ์—ฐ๊ฒฐ๋˜๊ณ , Slave PIC๋Š” Master PIC์— ์—ฐ๊ฒฐ๋˜์–ด ๋” ๋งŽ์€ ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ์ฒ˜๋ฆฌํ•ฉ๋‹ˆ๋‹ค.
  • ์ธํ„ฐ๋ŸฝํŠธ ๋ฒกํ„ฐ ํ• ๋‹น: PIC๋Š” ๊ฐ ์ธํ„ฐ๋ŸฝํŠธ์— ๋Œ€ํ•ด ๊ณ ์œ ํ•œ ์ธํ„ฐ๋ŸฝํŠธ ๋ฒกํ„ฐ ๋ฒˆํ˜ธ๋ฅผ ํ• ๋‹นํ•ฉ๋‹ˆ๋‹ค. ์ด๋ฅผ ํ†ตํ•ด ์šด์˜์ฒด์ œ๋Š” ์–ด๋–ค ์ธํ„ฐ๋ŸฝํŠธ๊ฐ€ ๋ฐœ์ƒํ–ˆ๋Š”์ง€๋ฅผ ์‹๋ณ„ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

์ „ํ†ต์ ์œผ๋กœ 8259A PIC๋Š” 8๊ฐœ์˜ ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ๊ด€๋ฆฌํ•˜๋ฉฐ, ์ด๋Š” IRQ(Interrupt Request)๋ผ๊ณ  ๋ถˆ๋ฆฌ๋Š” ์ธํ„ฐ๋ŸฝํŠธ ์„ ์œผ๋กœ๋ถ€ํ„ฐ ๋ฐœ์ƒํ•ฉ๋‹ˆ๋‹ค. ๋” ํ˜„๋Œ€์ ์ธ ์ปดํ“จํ„ฐ ์‹œ์Šคํ…œ์—์„œ๋Š” APIC(Advanced Programmable Interrupt Controller) ๋“ฑ ๋” ๋ฐœ์ „ํ•œ ํ˜•ํƒœ์˜ ์ธํ„ฐ๋ŸฝํŠธ ์ปจํŠธ๋กค๋Ÿฌ๊ฐ€ ์‚ฌ์šฉ๋˜๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค

 

 

DMA ์ž…์ถœ๋ ฅ 

DMA(Direct Memory Access)๋Š” ์ปดํ“จํ„ฐ ์‹œ์Šคํ…œ์—์„œ ์ž…์ถœ๋ ฅ ์žฅ์น˜์™€ ๋ฉ”๋ชจ๋ฆฌ ๊ฐ„ ๋ฐ์ดํ„ฐ ์ „์†ก์„ ํšจ๊ณผ์ ์œผ๋กœ ์ฒ˜๋ฆฌํ•˜๊ธฐ ์œ„ํ•œ ๋ฉ”์ปค๋‹ˆ์ฆ˜์ž…๋‹ˆ๋‹ค. DMA๋ฅผ ์‚ฌ์šฉํ•˜๋ฉด CPU๊ฐ€ ์ง์ ‘ ๊ด€์—ฌํ•˜์ง€ ์•Š๊ณ , ์ž…์ถœ๋ ฅ ์žฅ์น˜์™€ ๋ฉ”๋ชจ๋ฆฌ ๊ฐ„ ๋ฐ์ดํ„ฐ๋ฅผ ์ „์†กํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.


์ฃผ์š” ํŠน์ง•

  • ๋น„๋™๊ธฐ์  ์ „์†ก: DMA๋Š” ์ž…์ถœ๋ ฅ ์ž‘์—…์„ CPU์— ์˜์กดํ•˜์ง€ ์•Š๊ณ  ๋ณ„๋„๋กœ ์ฒ˜๋ฆฌํ•ฉ๋‹ˆ๋‹ค. ๋”ฐ๋ผ์„œ CPU๋Š” ๋‹ค๋ฅธ ์ž‘์—…์„ ์ˆ˜ํ–‰ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.
  • ๋†’์€ ์ „์†ก ์†๋„: DMA๋Š” CPU์™€๋Š” ๋ณ„๋„๋กœ ๋ฐ์ดํ„ฐ๋ฅผ ์ „์†กํ•˜๊ธฐ ๋•Œ๋ฌธ์—, ์ž…์ถœ๋ ฅ ์žฅ์น˜์™€ ๋ฉ”๋ชจ๋ฆฌ ๊ฐ„์˜ ๋ฐ์ดํ„ฐ ์ „์†ก์ด ๋น ๋ฅด๊ฒŒ ์ด๋ฃจ์–ด์งˆ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.
  • ๋ฉ”๋ชจ๋ฆฌ ์ ‘๊ทผ ๊ถŒํ•œ: DMA๋Š” ๋ฉ”๋ชจ๋ฆฌ์— ์ง์ ‘ ์ ‘๊ทผํ•  ์ˆ˜ ์žˆ์œผ๋ฏ€๋กœ, ์ž…์ถœ๋ ฅ ์žฅ์น˜์™€ ๋ฉ”๋ชจ๋ฆฌ ๊ฐ„์˜ ๋ฐ์ดํ„ฐ ์ „์†ก์— ์žˆ์–ด์„œ ๋†’์€ ํšจ์œจ์„ฑ์„ ์ œ๊ณตํ•ฉ๋‹ˆ๋‹ค.

๋™์ž‘ ๊ณผ์ •

  • DMA ์š”์ฒญ: ์ž…์ถœ๋ ฅ ์žฅ์น˜๋Š” ๋ฐ์ดํ„ฐ ์ „์†ก์„ ์œ„ํ•ด DMA์— ์š”์ฒญ์„ ๋ณด๋ƒ…๋‹ˆ๋‹ค.
  • DMA ์ปจํŠธ๋กค๋Ÿฌ ํ™œ์„ฑํ™”: DMA ์ปจํŠธ๋กค๋Ÿฌ๋Š” ์š”์ฒญ์„ ๋ฐ›์œผ๋ฉด CPU์—๊ฒŒ ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ๋ฐœ์ƒ์‹œํ‚ค๊ณ , CPU๋Š” DMA ์ปจํŠธ๋กค๋Ÿฌ๋ฅผ ํ™œ์„ฑํ™”ํ•ฉ๋‹ˆ๋‹ค.
  • ๋ฉ”๋ชจ๋ฆฌ ์ ‘๊ทผ: DMA ์ปจํŠธ๋กค๋Ÿฌ๋Š” CPU๊ฐ€ ์•„๋‹Œ ์ง์ ‘ ๋ฉ”๋ชจ๋ฆฌ์— ์ ‘๊ทผํ•˜์—ฌ ๋ฐ์ดํ„ฐ๋ฅผ ์ฝ๊ฑฐ๋‚˜ ์”๋‹ˆ๋‹ค.
  • ์ „์†ก ์™„๋ฃŒ: ๋ฐ์ดํ„ฐ ์ „์†ก์ด ์™„๋ฃŒ๋˜๋ฉด DMA ์ปจํŠธ๋กค๋Ÿฌ๋Š” CPU์—๊ฒŒ ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ๋ฐœ์ƒ์‹œํ‚ค๊ณ , CPU๋Š” ์ด๋ฅผ ์ฒ˜๋ฆฌํ•˜์—ฌ ์ž…์ถœ๋ ฅ ์žฅ์น˜์™€์˜ ๋ฐ์ดํ„ฐ ์ „์†ก์ด ์™„๋ฃŒ๋˜์—ˆ์Œ์„ ํ™•์ธํ•ฉ๋‹ˆ๋‹ค.

DMA ์ปจํŠธ๋กค๋Ÿฌ(Direct Memory Access Controller)

  • DMA ์ปจํŠธ๋กค๋Ÿฌ(Direct Memory Access Controller)๋Š” ์ปดํ“จํ„ฐ ์‹œ์Šคํ…œ์—์„œ DMA ๊ธฐ๋Šฅ์„ ๊ด€๋ฆฌํ•˜๊ณ  ์ œ์–ดํ•˜๋Š” ์žฅ์น˜์ž…๋‹ˆ๋‹ค.
  • DMA ์ปจํŠธ๋กค๋Ÿฌ๋Š” CPU์˜ ๊ฐ„์„ญ ์—†์ด ์ž…์ถœ๋ ฅ ์žฅ์น˜์™€ ๋ฉ”๋ชจ๋ฆฌ ๊ฐ„์˜ ๋ฐ์ดํ„ฐ ์ „์†ก์„ ์ˆ˜ํ–‰ํ•˜๋ฉฐ, ์ด๋ฅผ ํ†ตํ•ด ๋†’์€ ์„ฑ๋Šฅ๊ณผ ํšจ์œจ์„ฑ์„ ์ œ๊ณตํ•ฉ๋‹ˆ๋‹ค.

DMA๋ฅผ ์‚ฌ์šฉํ•จ์œผ๋กœ์จ CPU๋Š” ์ž…์ถœ๋ ฅ ์ž‘์—…์˜ ์ง„ํ–‰ ์ƒํƒœ๋ฅผ ๊ณ„์† ํ™•์ธํ•˜๊ฑฐ๋‚˜ ๋ฐ์ดํ„ฐ๋ฅผ ์ง์ ‘ ์ „์†กํ•˜๋Š” ๋ฐ ํ•„์š”ํ•œ ์‹œ๊ฐ„์„ ์ ˆ์•ฝํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋Š” ํŠนํžˆ ๋Œ€์šฉ๋Ÿ‰์˜ ๋ฐ์ดํ„ฐ ์ „์†ก์ด ํ•„์š”ํ•œ ๊ฒฝ์šฐ๋‚˜ ๊ณ ์† ์ž…์ถœ๋ ฅ ์žฅ์น˜์™€์˜ ํšจ์œจ์ ์ธ ์ƒํ˜ธ์ž‘์šฉ์„ ์œ„ํ•ด ์œ ์šฉํ•ฉ๋‹ˆ๋‹ค.

 

 


ํ”„๋กœ๊ทธ๋žจ ์ž…์ถœ๋ ฅ 

(Programmed I/O): The basic input/output method where the program directly controls the data transfer between the CPU

and I/O devices.

๋ฉ”๋ชจ๋ฆฌ ๋งต ์ž…์ถœ๋ ฅ 

(Memory-Mapped I/O): A technique where I/O device registers are mapped to the memory address space, allowing the program to interact with I/O devices using memory read and write operations.

๊ณ ๋ฆฝํ˜• ์ž…์ถœ๋ ฅ

(Isolated I/O): A method where I/O devices independently perform operations without direct CPU involvement, and completion is signaled through interrupts without the CPU waiting.

์ธํ„ฐ๋ŸฝํŠธ ๊ธฐ๋ฐ˜ ์ž…์ถœ๋ ฅ 

(Interrupt-Driven I/O): An approach where I/O devices generate interrupts to signal the completion of an operation, allowing the CPU to perform other tasks while waiting for I/O completion.

DMA ์ž…์ถœ๋ ฅ

(Direct Memory Access I/O): A mechanism enabling data transfer between I/O devices and memory without CPU intervention, improving efficiency by allowing the CPU to execute other tasks during the transfer.

 

๋Œ“๊ธ€