๋ณธ๋ฌธ ๋ฐ”๋กœ๊ฐ€๊ธฐ
Computer Science/Computer Structure

12 Cache Memory (์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ)

by Dowon Kang 2023. 12. 31.

์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ๋Š” ์ปดํ“จํ„ฐ ์‹œ์Šคํ…œ์˜ ์„ฑ๋Šฅ์„ ํ–ฅ์ƒ์‹œํ‚ค๊ธฐ ์œ„ํ•ด ์‚ฌ์šฉ๋˜๋Š” ์ค‘์š”ํ•œ ์š”์†Œ ์ค‘ ํ•˜๋‚˜์ž…๋‹ˆ๋‹ค. ์ฃผ๋กœ ํ”„๋กœ์„ธ์„œ์™€ ์ฃผ ๊ธฐ์–ต์žฅ์น˜(์ฃผ ๋ฉ”๋ชจ๋ฆฌ) ๊ฐ„์˜ ์†๋„ ์ฐจ์ด๋ฅผ ๊ทน๋ณตํ•˜๊ธฐ ์œ„ํ•œ ๋ชฉ์ ์œผ๋กœ ์‚ฌ์šฉ๋ฉ๋‹ˆ๋‹ค.

์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ๋Š” ์ฃผ๋กœ ๋น ๋ฅธ ์†๋„๋กœ ์ ‘๊ทผํ•  ์ˆ˜ ์žˆ๋Š” ์ž‘์€ ์šฉ๋Ÿ‰์˜ ๋ฉ”๋ชจ๋ฆฌ์ž…๋‹ˆ๋‹ค. ์ด๋ฅผ ํ†ตํ•ด ํ”„๋กœ์„ธ์„œ๊ฐ€ ๋” ๋น ๋ฅด๊ฒŒ ๋ฐ์ดํ„ฐ์— ์ ‘๊ทผํ•  ์ˆ˜ ์žˆ์–ด ์ „๋ฐ˜์ ์ธ ์‹œ์Šคํ…œ ์„ฑ๋Šฅ์ด ํ–ฅ์ƒ๋ฉ๋‹ˆ๋‹ค.

์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ์˜ ์ข…๋ฅ˜

๋ ˆ๋ฒจ 1 ์บ์‹œ(L1 Cache): ํ”„๋กœ์„ธ์„œ์— ๋‚ด์žฅ๋œ ๊ฐ€์žฅ ๋น ๋ฅธ ์บ์‹œ๋กœ, ์†Œ๋Ÿ‰์˜ ๋ฐ์ดํ„ฐ์™€ ๋ช…๋ น์–ด๋ฅผ ์ €์žฅํ•ฉ๋‹ˆ๋‹ค.
๋ ˆ๋ฒจ 2 ์บ์‹œ(L2 Cache): L1 ์บ์‹œ๋ณด๋‹ค ํฌ๊ณ  ๋Š๋ฆฌ์ง€๋งŒ ์—ฌ์ „ํžˆ ๋น ๋ฅธ ์บ์‹œ๋กœ, ์—ฌ๋Ÿฌ ์ฝ”์–ด๊ฐ€ ๊ณต์œ ํ•˜๋Š” ๊ฒฝ์šฐ๊ฐ€ ๋งŽ์Šต๋‹ˆ๋‹ค.
๋ ˆ๋ฒจ 3 ์บ์‹œ(L3 Cache): ๋” ํฌ๊ณ  ๋Š๋ฆฐ ์บ์‹œ๋กœ, ์—ฌ๋Ÿฌ ์ฝ”์–ด ์‚ฌ์ด์—์„œ ๊ณต์œ ๋ฉ๋‹ˆ๋‹ค. L3 ์บ์‹œ๋ฉ”๋ชจ๋ฆฌ๋Š” ์ฝ”์–ด ์™ธ๋ถ€์— ์œ„์น˜ํ•ฉ๋‹ˆ๋‹ค.

 

์ฐธ์กฐ ์ง€์—ญ์„ฑ์˜ ์›๋ฆฌ

์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ๋Š” ์šฉ๋Ÿ‰์ด ์ ๊ธฐ ๋•Œ๋ฌธ์— CPU๊ฐ€ ํ•„์š”ํ•  ๋ฐ์ดํ„ฐ๋ฅผ ๋ฏธ๋ฆฌ ์˜ˆ์ธกํ•˜์—ฌ ์ ์žฌํ•˜๋Š” ๊ฒฝ์šฐ๊ฐ€ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด ๋•Œ, ์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ์— CPU๊ฐ€ ์›ํ•˜๋Š” ๋ฐ์ดํ„ฐ๊ฐ€ ์žˆ๋Š”์ง€์— ๋”ฐ๋ผ ์บ์‹œ ํžˆํŠธ์™€ ์บ์‹œ ๋ฏธ์Šค๋กœ ๋‚˜๋‰˜๊ฒŒ ๋ฉ๋‹ˆ๋‹ค.

 

  1. ์บ์‹œ ํžˆํŠธ(Cache Hit): ์บ์‹œ์—์„œ ๋ฐ์ดํ„ฐ๋ฅผ ์ฐพ๋Š” ๋ฐ ์„ฑ๊ณตํ•˜๋Š” ๊ฒฝ์šฐ. ์บ์‹œ์— ์ด๋ฏธ ํ•ด๋‹น ๋ฐ์ดํ„ฐ๊ฐ€ ์กด์žฌํ•จ.
  2. ์บ์‹œ ๋ฏธ์Šค(Cache Miss): ์บ์‹œ์—์„œ ๋ฐ์ดํ„ฐ๋ฅผ ์ฐพ์ง€ ๋ชปํ•˜๋Š” ๊ฒฝ์šฐ. ๋ฐ์ดํ„ฐ๋ฅผ ์ฃผ ๋ฉ”๋ชจ๋ฆฌ์—์„œ ๊ฐ€์ ธ์™€์•ผ ํ•จ.

 

์บ์‹œ ์ ์ค‘๋ฅ (Cache Hit Rate)

์บ์‹œ์—์„œ ์›ํ•˜๋Š” ๋ฐ์ดํ„ฐ๋ฅผ ์ฐพ๋Š”๋ฐ ์„ฑ๊ณตํ•œ ๋น„์œจ์„ ๋‚˜ํƒ€๋ƒ„. ๊ณต์‹์€ ๋‹ค์Œ๊ณผ ๊ฐ™์Œ:

๋†’์€ ์บ์‹œ ์ ์ค‘๋ฅ ์€ ํšจ์œจ์ ์ธ ์บ์‹œ ์‚ฌ์šฉ์„ ๋‚˜ํƒ€๋‚ด๋ฉฐ, ์ด๋Š” ์ „์ฒด ์‹œ์Šคํ…œ์˜ ์„ฑ๋Šฅ ํ–ฅ์ƒ๊ณผ ๊ด€๋ จ์ด ์žˆ์Šต๋‹ˆ๋‹ค. ๋”ฐ๋ผ์„œ ํ”„๋กœ๊ทธ๋ž˜๋จธ์™€ ์ปดํŒŒ์ผ๋Ÿฌ๋Š” ์ฐธ์กฐ ์ง€์—ญ์„ฑ์˜ ์›๋ฆฌ๋ฅผ ๊ณ ๋ คํ•˜์—ฌ ๋ฐ์ดํ„ฐ ์•ก์„ธ์Šค ํŒจํ„ด์„ ์ตœ์ ํ™”ํ•˜๊ณ , ์ด๋ฅผ ํ†ตํ•ด ์บ์‹œ ์ ์ค‘๋ฅ ์„ ๋†’์ด๋ ค๊ณ  ๋…ธ๋ ฅํ•ฉ๋‹ˆ๋‹ค. ์ฐธ๊ณ ๋กœ ์š”์ฆ˜ ์ปดํ“จํ„ฐ์˜ ์บ์‹œ ์ ์ค‘๋ฅ ์€ 80% ์ •๋„ ๋ฉ๋‹ˆ๋‹ค. 

 

์ ์ค‘๋ฅ ์„ ์˜ฌ๋ฆฌ๊ธฐ ์œ„ํ•ด ์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ๊ฐ€ ๊ฐ€์ง€๋Š” ํŠน์ง•์ด ์žˆ์Šต๋‹ˆ๋‹ค. 

  • ์‹œ๊ฐ„์  ์ง€์—ญ์„ฑ(Temporal Locality): ํ•œ ๋ฒˆ ์ฐธ์กฐ๋œ ๋ฐ์ดํ„ฐ๊ฐ€ ์ž ์‹œ ํ›„์— ๋‹ค์‹œ ์ฐธ์กฐ๋  ๊ฐ€๋Šฅ์„ฑ์ด ๋†’๋‹ค. ์ฃผ๋กœ ๋ณ€์ˆ˜๋‚˜ ๋ฃจํ”„, ๋ฐ˜๋ณต๋ฌธ์—์„œ ๋‚˜ํƒ€๋‚จ. ์˜ˆ๋ฅผ ๋“ค์–ด, CPU๋Š” ํ•œ ๋ฒˆ ์„ ์–ธ๋œ ๋ณ€์ˆ˜์— ๊ณ„์† ์ ‘๊ทผํ•˜๋ ค๋Š” ๊ฒฝํ–ฅ์„ ๊ฐ€์ง
  • ๊ณต๊ฐ„์  ์ง€์—ญ์„ฑ(Spatial Locality): ์ฐธ์กฐ๋œ ๋ฐ์ดํ„ฐ ๊ทผ์ฒ˜์˜ ๋ฐ์ดํ„ฐ๋„ ์ฐธ์กฐ๋  ๊ฐ€๋Šฅ์„ฑ์ด ๋†’๋‹ค. ์—ฐ์†์ ์œผ๋กœ ๋ฉ”๋ชจ๋ฆฌ์— ์ €์žฅ๋œ ๋ฐ์ดํ„ฐ๊ฐ€ ํ•จ๊ป˜ ์ฐธ์กฐ๋˜๋Š” ๊ฒฝ์šฐ๊ฐ€ ์ด์— ํ•ด๋‹นํ•จ. ์˜ˆ๋ฅผ ๋“ค์–ด, ๊ฒŒ์ž„ ๋ฐ์ดํ„ฐ๊ฐ€ ๋ชจ์—ฌ ์žˆ๋Š” ๊ณต๊ฐ„์„ ๊ณ„์† ์‚ดํ”ผ๊ฒŒ ๋˜๋Š” ๊ฒฝํ–ฅ

 

์บ์‹œ ๋ผ์ธ(Cache Line)

์บ์‹œ ๋ผ์ธ(Cache Line)์€ ์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ์—์„œ ๋ฐ์ดํ„ฐ๋ฅผ ์ฝ๊ฑฐ๋‚˜ ์“ธ ๋•Œ ์‚ฌ์šฉ๋˜๋Š” ์ž‘์€ ๋ธ”๋ก ๋‹จ์œ„๋ฅผ ๋‚˜ํƒ€๋ƒ…๋‹ˆ๋‹ค. ๋ฉ”๋ชจ๋ฆฌ ์‹œ์Šคํ…œ์€ ๋ฐ์ดํ„ฐ๋ฅผ ๋ธ”๋ก ๋‹จ์œ„๋กœ ์ „์†กํ•˜๋ฏ€๋กœ, ์บ์‹œ ์—ญ์‹œ ๋ฉ”๋ชจ๋ฆฌ์˜ ๋ฐ์ดํ„ฐ๋ฅผ ์บ์‹œ ๋ผ์ธ์ด๋ผ ๋ถˆ๋ฆฌ๋Š” ๊ณ ์ •๋œ ํฌ๊ธฐ์˜ ๋ธ”๋ก ๋‹จ์œ„๋กœ ์ €์žฅํ•ฉ๋‹ˆ๋‹ค.


์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ๋Š” ํ”„๋กœ์„ธ์„œ์™€ ์ฃผ ๋ฉ”๋ชจ๋ฆฌ ์‚ฌ์ด์˜ ์†๋„ ์ฐจ์ด๋ฅผ ์ค„์—ฌ ์ „์ฒด ์‹œ์Šคํ…œ ์„ฑ๋Šฅ์„ ํ–ฅ์ƒ์‹œํ‚ค๋Š” ์—ญํ• ์„ ํ•ฉ๋‹ˆ๋‹ค. ํŠนํžˆ, ๋ฐ˜๋ณต์ ์œผ๋กœ ์‚ฌ์šฉ๋˜๋Š” ๋ฐ์ดํ„ฐ์— ๋†’์€ ํšจ๊ณผ๋ฅผ ๋ฐœํœ˜ํ•˜๋ฉฐ, ํ˜„๋Œ€ ์ปดํ“จํ„ฐ ์•„ํ‚คํ…์ฒ˜์—์„œ๋Š” ๊ฑฐ์˜ ๋ชจ๋“  ์‹œ์Šคํ…œ์—์„œ ์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ๋ฅผ ์‚ฌ์šฉํ•˜๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.

 

 


์บ์‹œ ๋ฉ”๋ชจ๋ฆฌ (Cache Memory): A high-speed temporary storage space located between the processor and main memory, primarily used to store frequently accessed data and improve overall system performance.

 

์ฐธ์กฐ ์ง€์—ญ์„ฑ์˜ ์›๋ฆฌ (Principle of Locality): The principle that states when data or instructions are accessed once, there is a high probability they will be accessed again shortly afterward, reflecting temporal locality, and that nearby data will also likely be accessed, reflecting spatial locality.

์บ์‹œ ํžˆํŠธ (Cache Hit): The successful retrieval of data from the cache, indicating that frequently accessed data is already present in the cache.

์บ์‹œ ์ ์ค‘๋ฅ  (Cache Hit Rate): A percentage measure representing the ratio of successful cache hits to the total memory accesses, indicating the efficiency of the cache.

์บ์‹œ ๋ฏธ์Šค (Cache Miss): The situation where data is not found in the cache, necessitating the retrieval of the required data from the main memory.

์‹œ๊ฐ„์˜ ์ง€์—ญ์„ฑ (Temporal Locality): The aspect of the principle of locality stating that if data is accessed once, there is a high likelihood it will be accessed again shortly afterward.

๊ณต๊ฐ„์˜ ์ง€์—ญ์„ฑ (Spatial Locality): The aspect of the principle of locality stating that data accessed is likely to be in proximity to other accessed data.

 

 

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